High-Performance Computing

This page was translated automatically using artificial intelligence (DeepL). The German version is binding. More information about automatic translation

FPGA Programming

Xilinx Vivado constraints file (link) advanced constraints (link)
BASYS3 technical information (link)
Vivado getting started/logic gates/basics (pdf)

Adder (pdf)

KV diagram exercise (pdf)

Circuit in Verilog and vice versa (pdf)

Memory and multiplexers (pdf)

7-segment display (pdf)